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Power Integrity for Nanoscale Integrated Systems

Power Integrity for Nanoscale Integrated Systems

1st Edition
By Masanori Hashimoto and Raj Nair
Copyright: 2014

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ISBN10: 0071787763 | ISBN13: 9780071787765


The estimated amount of time this product will be on the market is based on a number of factors, including faculty input to instructional design and the prior revision cycle and updates to academic research-which typically results in a revision cycle ranging from every two to four years for this product. Pricing subject to change at any time.

Program Details

Ch. 1: Significance of Power Integrity for Integrated Circuits
Ch. 2. Supply and Substrate Noise Impact on Circuits
Ch. 3. Clock Generation and Clock Distribution with PI Degradation
Ch. 4. Chip IO Circuits and PI
Ch. 5. Modeling of Circuits and IP Cores for PI Analysis
Ch. 6. Power Integrity Degradation and Modeling
Ch. 7. Lowe Power Techniques and PI Impact
Ch. 8. Chip Temperature and PI Impact
Ch. 9. Case Study: Chip ZZZZZ, Inferences and Conclusions
Ch. 10. PI in the Nanotechnology Realm