Analog Integrated Circuit Design by Simulation: Techniques, Tools, and Methods 1 9781260441451 Publisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product. Learn the principles and practices of simulation-based analog IC design This comprehensive textbook and on-the-job reference offers clear instruction on analog integrated circuit design using the latest simulation techniques. Ideal for graduate students and professionals alike, the book shows, step by step, how to develop and deploy integrated circuits for cutting-edge Internet of Things (IoT) and other applications. Analog Integrated Circuit Design by Simulation: Techniques, Tools, and Methods lays out practical, ready-to-apply engineering strategies. Application layer, device layer, and circuit layer IC design are covered in complete detail. You will learn how to tackle real-world design problems and avoid long cycles of trial and error. Coverage includes: • First-order DC response • Unified closed-loop model • Accurate modeling of DC response • Frequency and step response • Multi-pole dynamic response and stability • Effect of external network on differential gain • Continuous-time and discrete-time amplifiers • MOSFET, NMOS, and PMOS characteristics • Small-signal modeling and circuit analysis • Resistor and capacitor design • Current sources, sinks, and mirrors • Basic, symmetrical, folded-cascode, and Miller OTAs • Opamps with source-follower and common-source output stages • Fully differential OTAs and opamps
Analog Integrated Circuit Design by Simulation: Techniques, Tools, and Methods

Analog Integrated Circuit Design by Simulation: Techniques, Tools, and Methods

1st Edition
ISBN10: 1260441458
ISBN13: 9781260441451
Copyright: 2019

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ISBN10: 1260441458 | ISBN13: 9781260441451



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Program Details

1 Preliminaries
2 Application Layer
2.1 Introduction
2.2 First-Order DC Response
2.2.1 First-Order Open-Loop DC Transfer Characteristic and Range Limitations
2.2.2 DC Analysis with Virtual-Short Approximation
2.3 Unified Closed-Loop Model
2.3.1 A Generalized External-Network Model
2.3.2 Extraction Procedures for Feedback and Input Factors
2.4 Accurate Modeling of DC Response
2.4.1 Open-Loop and Closed-Loop DC Transfer Functions
2.4.2 DC Error
2.5 Frequency Response
2.5.1 Small-Signal Frequency Response
2.5.2 Slew-Limited Bandwidth
2.5.3 Harmonic Distortion
2.6 Step Response
2.6.1 Slew-Free Step Response
2.6.2 Slew-Limited Step Response
2.7 Multi-Pole Dynamic Response and Stability
2.7.1 Two-Pole Dynamic Response
2.7.2 Loop Gain, Phase Margin, and Stability
2.8 Effect of External Network on Differential Gain
2.9 Noise
2.9.1 Power Supply Noise
2.9.2 Fundamentals of Inherent Noise Analysis
2.9.3 Closed-Loop Noise Analysis
2.10 Fully-Differential Continuous-Time Amplifiers
2.10.1 First-Order DC Response and Range Limitations
2.10.2 Unified Closed-Loop Model
2.10.3 Accurate Modeling of DC Response
2.10.4 Frequency Response and Step Response
2.10.5 Loop Gain, Differential Gain, and Noise
2.11 Discrete-Time Amplifiers
2.11.1 DC Analysis with Charge Conservation
2.11.2 Unified Closed-Loop Model
2.11.3 Accurate Modeling of DC Response
2.11.4 Transient Response
2.11.5 Loop-Gain Extraction
2.12 Fully-Differential Discrete-Time Amplifiers
2.12.1 DC Analysis with Charge Conservation
2.12.2 Unified Closed-Loop Model
2.12.3 Accurate Modeling of DC Response
2.12.4 Transient Analysis and Loop-Gain Extraction
2.13 References
2.14 Exercises
3 Device Layer
3.1 Introduction
3.2 MOSFET Basics
3.2.1 Structure and Electrical Ports
3.2.2 Performance Metrics and Design Variables
3.3 NMOS Design Relations and Tools
3.3.1 Long-Channel Models
3.3.2 Threshold Voltage
3.3.3 Drain-Source Saturation Voltage
3.3.4 Sheet Current
3.3.5 Transconductance Efficiency
3.3.6 Output Resistance and Early Voltage
3.4 PMOS Design Relations and Tools
3.4.1 Strong-Inversion Model
3.4.2 Subthreshold Model
3.4.3 Threshold Voltage
3.4.4 Drain-Source Saturation Voltage, Sheet Current, and Transconductance Efficiency
3.4.5 Output Resistance and Early Voltage
3.5 Thermal Effects
3.6 Biasing and Sizing a MOSFET with Design Tools
3.7 Small-Signal Modeling and Circuit Analysis
3.7.1 MOSFET DC Small-Signal Model
3.7.2 DC Small-Signal Circuit Analysis
3.7.3 MOSFET Capacitances and High-Frequency Small-Signal Model
3.8 MOSFET Noise Model
3.9 MOSFET as a Switch
3.9.1 Single-Device and Transmission-Gate Switch Properties
3.9.2 Charge Injection and Clock Feedthrough
3.10 Resistor Design
3.10.1 Resistor Structures and Resistance Modeling
3.10.2 Design Techniques for Accuracy and Precision
3.10.3 MOSFET as a Resistor
3.11 Capacitor Design
3.11.1 MIM Capacitor
3.11.2 MOSFET as a Capacitor
3.12 References
3.13 Exercises
4 Circuit Layer
4.1 Introduction
4.2 Current Sources, Sinks, and Mirrors
4.2.1 Fundamental Concepts and Performance Metrics
4.2.2 Accuracy and Precision in Current Mirroring
4.2.3 Basic Cascoding
4.2.4 Low-Voltage Cascoding
4.2.5 Regulated Cascoding
4.2.6 Self-Cascoding
4.3 Current and Voltage References
4.3.1 Voltage-Divider Current Reference
4.3.2 Beta-Multiplier Current Reference
4.3.3 Bandgap Voltage Reference
4.4 Basic Amplifier Stages
4.4.1 Common-Source Stage
4.4.2 Source Follower
4.4.3 Basic Differential Pair
4.4.4 Source-Degenerated Differential Pair
4.4.5 Super-GM Differential Pair
4.5 Basic OTA
4.5.1 DC Transfer Characteristic as a Voltage Amplifier
4.5.2 Range Limitations
4.5.3 DC Differential Gain and Offset
4.5.4 Frequency Response and Step Response
4.5.5 Noise-Related Properties
4.6 Symmetrical OTA
4.6.1 Topology and DC Transfer Characteristic
4.6.2 Range Limitations
4.6.3 DC Differential Gain and Offset
4.6.4 Frequency Response and Step Response
4.6.5 Noise-Related Properties
4.6.6 Cascoded-Symmetrical OTA
4.7 Folded-Cascode OTA
4.7.1 Topology and DC Transfer Characteristic
4.7.2 DC Differential Gain and Range Limitations
4.7.3 Frequency Response, Step Response, and Noise-Related Properties
4.7.4 Rail-to-Rail Folded-Cascode OTA
4.8 Miller OTA
4.8.1 Topology and DC Response
4.8.2 Frequency Response and Noise-Related Properties
4.8.3 Step Response
4.9 Opamp with a Push-Pull Source-Follower Output Stage
4.9.1 Topologies and Operation
4.9.2 DC Response
4.9.3 Frequency Response, Step Response, and Noise
4.10 Opamp with a Push-Pull Common-Source Output Stage
4.11 Fully-Differential OTAs and Opamps
4.11.1 Core Topologies and Properties
4.11.2 Common-Mode Feedback Circuits
4.11.3 Design Examples
4.12 References
4.13 Exercises