Power Integrity for Nanoscale Integrated Systems https://www.mheducation.com/cover-images/Jpeg_250-high/0071787763.jpeg?404URL=https://shop.mheducation.com/mhshopweb/images/no_cover_140.png
Table of Contents

Interested in seeing the entire table of contents?


Program Details

Ch. 1: Significance of Power Integrity for Integrated Circuits
Ch. 2. Supply and Substrate Noise Impact on Circuits
Ch. 3. Clock Generation and Clock Distribution with PI Degradation
Ch. 4. Chip IO Circuits and PI
Ch. 5. Modeling of Circuits and IP Cores for PI Analysis
Ch. 6. Power Integrity Degradation and Modeling
Ch. 7. Lowe Power Techniques and PI Impact
Ch. 8. Chip Temperature and PI Impact
Ch. 9. Case Study: Chip ZZZZZ, Inferences and Conclusions
Ch. 10. PI in the Nanotechnology Realm